Add FPP Interfaces (#3709)

* Interfaces

* Point to new fpp alpha release

* Fix the fprime-gds version

* Update for framer/deframer work

* Fix cmake tests

* Clean up annotations

* Clean up final fpp

Drv/CMakeLists.txt

@@ -1,6 +1,7 @@
 # Module subdirectories
 
 # Ports
+add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Interfaces/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Ports/")
 
 # Components

Drv/Interfaces/ByteStreamDriver.fpp

@@ -0,0 +1,18 @@
+module Drv {
+    interface ByteStreamDriver {
+        @ Port invoked when the driver is ready to send/receive data
+        output port ready: Drv.ByteStreamReady
+
+        @ Port invoked by the driver when it receives data
+        output port $recv: Drv.ByteStreamData
+
+        @ Invoke this port to send data out the driver
+        guarded input port $send: Fw.BufferSend
+
+        @ Port returning ownership of data received on $send port
+        output port sendReturnOut: Drv.ByteStreamData
+
+        @ Port receiving back ownership of data sent out on $recv port
+        guarded input port recvReturnIn: Fw.BufferSend
+    }
+}

Drv/Interfaces/ByteStreamDriverInterface.fppi

@@ -1,14 +0,0 @@
-    @ Port invoked when the driver is ready to send/receive data
-    output port ready: Drv.ByteStreamReady
-
-    @ Port invoked by the driver when it receives data
-    output port $recv: Drv.ByteStreamData
-
-    @ Invoke this port to send data out the driver
-    guarded input port $send: Fw.BufferSend
-
-    @ Port returning ownership of data received on $send port
-    output port sendReturnOut: Drv.ByteStreamData
-
-    @ Port receiving back ownership of data sent out on $recv port
-    guarded input port recvReturnIn: Fw.BufferSend

Drv/Interfaces/CMakeLists.txt

@@ -0,0 +1,17 @@
+####
+# F prime CMakeLists.txt:
+#
+# SOURCE_FILES: combined list of source and autocoding files
+# MOD_DEPS: (optional) module dependencies
+#
+####
+register_fprime_module(
+    Drv_Interfaces
+  AUTOCODER_INPUTS
+    "${CMAKE_CURRENT_LIST_DIR}/ByteStreamDriver.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/Gpio.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/I2c.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/Spi.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/Tick.fpp"
+  INTERFACE
+)

Drv/Interfaces/Gpio.fpp

@@ -0,0 +1,12 @@
+module Drv {
+    interface Gpio {
+        @ Port used to write to a GPIO pin
+        sync input port gpioWrite: Drv.GpioWrite
+
+        @ Port used to read from a GPIO pin
+        sync input port gpioRead: Drv.GpioRead
+
+        @ Port used to indicate transition on the GPIO pin
+        output port gpioInterrupt: Svc.Cycle
+    }
+}

Drv/Interfaces/GpioInterface.fppi

@@ -1,9 +0,0 @@
-
-@ Port used to write to a GPIO pin
-sync input port gpioWrite: Drv.GpioWrite
-
-@ Port used to read from a GPIO pin
-sync input port gpioRead: Drv.GpioRead
-
-@ Port used to indicate transition on the GPIO pin
-output port gpioInterrupt: Svc.Cycle

Drv/Interfaces/I2c.fpp

@@ -0,0 +1,12 @@
+module Drv {
+    interface I2c {
+        @ Port for guarded synchronous writing to I2C
+        guarded input port write: Drv.I2c
+
+        @ Port for guarded synchronous reading from I2C
+        guarded input port read: Drv.I2c
+
+        @ Port for synchronous writing and reading from I2C
+        guarded input port writeRead: Drv.I2cWriteRead
+    }
+}

Drv/Interfaces/I2cInterface.fppi

@@ -1,9 +0,0 @@
-
-@ Port for guarded synchronous writing to I2C
-guarded input port write: Drv.I2c
-
-@ Port for guarded synchronous reading from I2C
-guarded input port read: Drv.I2c
-
-@ Port for synchronous writing and reading from I2C
-guarded input port writeRead: Drv.I2cWriteRead

Drv/Interfaces/Spi.fpp

@@ -0,0 +1,6 @@
+module Drv {
+    interface Spi {
+        @ Port to perform a synchronous read/write operation over the SPI bus
+        sync input port SpiReadWrite: Drv.SpiReadWrite
+    }
+}

Drv/Interfaces/SpiInterface.fppi

@@ -1,2 +0,0 @@
-@ Port to perform a synchronous read/write operation over the SPI bus
-sync input port SpiReadWrite: Drv.SpiReadWrite

Drv/Interfaces/Tick.fpp

@@ -0,0 +1,6 @@
+module Drv {
+    interface Tick {
+        @ The cycle outputs. Meant to be connected to rate group driver
+        output port CycleOut: Svc.Cycle
+    }
+}

Drv/Interfaces/TickInterface.fppi

@@ -1,2 +0,0 @@
-    @ The cycle outputs. Meant to be connected to rate group driver
-    output port CycleOut: Svc.Cycle

Drv/LinuxGpioDriver/LinuxGpioDriver.fpp

@@ -1,7 +1,7 @@
 module Drv {
 
   passive component LinuxGpioDriver {
-    include "../Interfaces/GpioInterface.fppi"
+    import Gpio
 
 
     # ----------------------------------------------------------------------

Drv/LinuxI2cDriver/LinuxI2cDriver.fpp

@@ -1,9 +1,7 @@
 module Drv {
 
   passive component LinuxI2cDriver {
-    include "../Interfaces/I2cInterface.fppi"
-
-    
+    import I2c
     }
 
 }

Drv/LinuxSpiDriver/LinuxSpiDriver.fpp

@@ -6,7 +6,7 @@ module Drv {
     # Interfaces
     # ----------------------------------------------------------------------
     
-    include "../../Drv/Interfaces/SpiInterface.fppi"
+    import Drv.Spi
 
     # ----------------------------------------------------------------------
     # Special ports

Drv/LinuxUartDriver/LinuxUartDriver.fpp

@@ -6,7 +6,7 @@ module Drv {
     # General ports
     # ----------------------------------------------------------------------
 
-    include "../Interfaces/ByteStreamDriverInterface.fppi"
+    import ByteStreamDriver
 
     @ Allocation port used for allocating memory in the receive task
     output port allocate: Fw.BufferGet

Drv/TcpClient/TcpClient.fpp

@@ -1,7 +1,7 @@
 module Drv {
     passive component TcpClient {
 
-        include "../Interfaces/ByteStreamDriverInterface.fppi"
+        import ByteStreamDriver
 
         @ Allocation for received data
         output port allocate: Fw.BufferGet

Drv/TcpServer/TcpServer.fpp

@@ -1,7 +1,7 @@
 module Drv {
     passive component TcpServer {
 
-        include "../Interfaces/ByteStreamDriverInterface.fppi"
+        import ByteStreamDriver
 
         @ Allocation for received data
         output port allocate: Fw.BufferGet

Drv/Udp/Udp.fpp

@@ -1,7 +1,7 @@
 module Drv {
     passive component Udp {
 
-        include "../Interfaces/ByteStreamDriverInterface.fppi"
+        import ByteStreamDriver
         
         output port allocate: Fw.BufferGet
 

FppTest/CMakeLists.txt

@@ -41,6 +41,7 @@ add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/component/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/dp/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/state_machine/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/enum/")
+add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/interfaces/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/struct/")
 
 set(SOURCE_FILES "source.cpp")
@@ -52,6 +53,7 @@ set(MOD_DEPS
     ${PROJECT_NAME}/component/queued
     ${PROJECT_NAME}/dp
     ${PROJECT_NAME}/enum
+    ${PROJECT_NAME}/interfaces
     ${PROJECT_NAME}/state_machine/external_instance
     ${PROJECT_NAME}/state_machine/internal/initial
     ${PROJECT_NAME}/state_machine/internal/state

FppTest/component/active/active.fpp

@@ -2,13 +2,12 @@
 active component ActiveTest {
 
   include "../include/internal_ports.fppi"
-  include "../include/serial_ports.fppi"
-  include "../include/serial_ports_async.fppi"
-  include "../include/special_ports.fppi"
-  include "../include/typed_ports.fppi"
-  include "../include/typed_ports_async.fppi"
-
-  include "../include/output_ports.fppi"
+  import FppTest.SerialPorts
+  import FppTest.SerialPortsAsync
+  import FppTest.SpecialPorts
+  import FppTest.TypedPorts
+  import FppTest.TypedPortsAsync
+  import FppTest.OutputPorts
 
   include "../include/commands.fppi"
   include "../include/commands_async.fppi"

FppTest/component/include/output_ports.fppi

@@ -1 +0,0 @@
-output port enumArgsHookOverflowed: [2] EnumArgs

FppTest/component/include/serial_ports.fppi

@@ -1,8 +0,0 @@
-@ A serial sync input port
-sync input port serialSync: [6] serial
-
-@ A serial guarded input
-guarded input port serialGuarded: [6] serial
-
-@ A serial output port
-output port serialOut: [6] serial

FppTest/component/include/serial_ports_async.fppi

@@ -1,11 +0,0 @@
-@ A serial async input port
-async input port serialAsync: [3] serial
-
-@ A serial async input port with queue full behavior and priority
-async input port serialAsyncAssert: serial assert
-
-@ A serial async input port with queue full behavior and priority
-async input port serialAsyncBlockPriority: serial priority 10 block
-
-@ A serial async input port with queue full behavior and priority
-async input port serialAsyncDropPriority: serial priority 5 drop

FppTest/component/include/special_ports.fppi

@@ -1,26 +0,0 @@
-@ A port for receiving commands
-command recv port cmdIn
-
-@ A port for sending command registration requests
-command reg port cmdRegOut
-
-@ A port for sending command responses
-command resp port cmdResponseOut
-
-@ A port for emitting events
-event port eventOut
-
-@ A port for emitting text events
-text event port textEventOut
-
-@ A port for emitting telemetry
-telemetry port tlmOut
-
-@ A port for getting parameter values
-param get port prmGetOut
-
-@ A port for setting parameter values
-param set port prmSetOut
-
-@ A port for getting the time
-time get port timeGetOut

FppTest/component/include/typed_ports.fppi

@@ -1,107 +0,0 @@
-# ----------------------------------------------------------------------
-# Typed input ports with no return type
-# ----------------------------------------------------------------------
-
-sync input port noArgsSync: [2] NoArgs
-
-guarded input port noArgsGuarded: [2] NoArgs
-
-sync input port primitiveArgsSync: [2] PrimitiveArgs
-
-guarded input port primitiveArgsGuarded: [2] PrimitiveArgs
-
-sync input port stringArgsSync: [2] StringArgs
-
-guarded input port stringArgsGuarded: [2] StringArgs
-
-sync input port enumArgsSync: [2] EnumArgs
-
-guarded input port enumArgsGuarded: [2] EnumArgs
-
-sync input port arrayArgsSync: [2] ArrayArgs
-
-guarded input port arrayArgsGuarded: [2] ArrayArgs
-
-sync input port structArgsSync: [2] StructArgs
-
-guarded input port structArgsGuarded: [2] StructArgs
-
-# ----------------------------------------------------------------------
-# Typed output ports with no return type
-# ----------------------------------------------------------------------
-
-output port noArgsOut: [2] NoArgs
-
-output port primitiveArgsOut: [2] PrimitiveArgs
-
-output port stringArgsOut: [2] StringArgs
-
-output port enumArgsOut: [2] EnumArgs
-
-output port arrayArgsOut: [2] ArrayArgs
-
-output port structArgsOut: [2] StructArgs
-
-# ----------------------------------------------------------------------
-# Typed input ports with return type
-# ----------------------------------------------------------------------
-
-sync input port noArgsReturnSync: NoArgsReturn
-
-guarded input port noArgsReturnGuarded: NoArgsReturn
-
-sync input port primitiveReturnSync: PrimitiveReturn
-
-guarded input port primitiveReturnGuarded: PrimitiveReturn
-
-sync input port stringReturnSync: StringReturn
- 
-guarded input port stringReturnGuarded: StringReturn
-
-sync input port stringAliasReturnSync: StringAliasReturn
- 
-guarded input port stringAliasReturnGuarded: StringAliasReturn
-
-sync input port enumReturnSync: EnumReturn
-
-guarded input port enumReturnGuarded: EnumReturn
-
-sync input port arrayReturnSync: ArrayReturn
-
-guarded input port arrayReturnGuarded: ArrayReturn
-
-sync input port arrayStringAliasReturnSync: ArrayStringAliasReturn
-
-guarded input port arrayStringAliasReturnGuarded: ArrayStringAliasReturn
-
-sync input port structReturnSync: StructReturn
-
-guarded input port structReturnGuarded: StructReturn
-
-# ----------------------------------------------------------------------
-# Typed output ports with return type
-# ----------------------------------------------------------------------
-
-output port noArgsReturnOut: NoArgsReturn
-
-output port primitiveReturnOut: PrimitiveReturn
-
-output port stringReturnOut: StringReturn
-
-output port stringAliasReturnOut: StringAliasReturn
-
-output port enumReturnOut: EnumReturn
-
-output port arrayReturnOut: ArrayReturn
-
-output port arrayStringAliasReturnOut: ArrayStringAliasReturn
-
-output port structReturnOut: StructReturn
-
-# ----------------------------------------------------------------------
-# Ports for testing special ports
-# ----------------------------------------------------------------------
-
-output port prmGetIn: Fw.PrmGet
-
-output port prmSetIn: Fw.PrmSet

FppTest/component/include/typed_ports_async.fppi

@@ -1,13 +0,0 @@
-async input port noArgsAsync: [2] NoArgs
-
-async input port primitiveArgsAsync: [2] PrimitiveArgs
-
-async input port stringArgsAsync: [2] StringArgs
-
-async input port enumArgsAsync: [2] EnumArgs assert
-
-async input port arrayArgsAsync: [2] ArrayArgs priority 10 block
-
-async input port structArgsAsync: [2] StructArgs priority 5 drop
-
-async input port enumArgsHook: [2] EnumArgs hook

FppTest/component/passive/passive.fpp

@@ -1,13 +1,9 @@
-#include "../include/fpp_types.fppi"
-#include "../include/port_types.fppi"
-#include "../include/port_index_enums.fppi"
-
 @ A passive component
 passive component PassiveTest {
 
-  include "../include/typed_ports.fppi"
-  include "../include/serial_ports.fppi"
-  include "../include/special_ports.fppi"
+  import FppTest.SerialPorts
+  import FppTest.SpecialPorts
+  import FppTest.TypedPorts
 
   include "../include/commands.fppi"
   include "../include/events.fppi"

FppTest/component/queued/queued.fpp

@@ -1,14 +1,14 @@
 @ A queued component
 queued component QueuedTest {
 
-  include "../include/typed_ports.fppi"
-  include "../include/typed_ports_async.fppi"
-  include "../include/serial_ports.fppi"
-  include "../include/serial_ports_async.fppi"
-  include "../include/special_ports.fppi"
-  include "../include/internal_ports.fppi"
+  import FppTest.SerialPorts
+  import FppTest.SerialPortsAsync
+  import FppTest.SpecialPorts
+  import FppTest.TypedPorts
+  import FppTest.TypedPortsAsync
+  import FppTest.OutputPorts
 
-  include "../include/output_ports.fppi"
+  include "../include/internal_ports.fppi"
 
   include "../include/commands.fppi"
   include "../include/commands_async.fppi"

FppTest/interfaces/CMakeLists.txt

@@ -0,0 +1,18 @@
+####
+# F prime CMakeLists.txt:
+#
+# SOURCE_FILES: combined list of source and autocoding files
+# MOD_DEPS: (optional) module dependencies
+#
+####
+register_fprime_module(
+    FppTest_interfaces
+  AUTOCODER_INPUTS
+    "${CMAKE_CURRENT_LIST_DIR}/output_ports.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/serial_ports_async.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/serial_ports.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/special_ports.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/typed_ports_async.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/typed_ports.fpp"
+  INTERFACE
+)

FppTest/interfaces/output_ports.fpp

@@ -0,0 +1,5 @@
+module FppTest {
+    interface OutputPorts {
+        output port enumArgsHookOverflowed: [2] EnumArgs
+    }
+}

FppTest/interfaces/serial_ports.fpp

@@ -0,0 +1,12 @@
+module FppTest {
+    interface SerialPorts {
+        @ A serial sync input port
+        sync input port serialSync: [6] serial
+
+        @ A serial guarded input
+        guarded input port serialGuarded: [6] serial
+
+        @ A serial output port
+        output port serialOut: [6] serial
+    }
+}

FppTest/interfaces/serial_ports_async.fpp

@@ -0,0 +1,15 @@
+module FppTest {
+    interface SerialPortsAsync {
+        @ A serial async input port
+        async input port serialAsync: [3] serial
+
+        @ A serial async input port with queue full behavior and priority
+        async input port serialAsyncAssert: serial assert
+
+        @ A serial async input port with queue full behavior and priority
+        async input port serialAsyncBlockPriority: serial priority 10 block
+
+        @ A serial async input port with queue full behavior and priority
+        async input port serialAsyncDropPriority: serial priority 5 drop
+    }
+}

FppTest/interfaces/special_ports.fpp

@@ -0,0 +1,30 @@
+module FppTest {
+    interface SpecialPorts {
+        @ A port for receiving commands
+        command recv port cmdIn
+
+        @ A port for sending command registration requests
+        command reg port cmdRegOut
+
+        @ A port for sending command responses
+        command resp port cmdResponseOut
+
+        @ A port for emitting events
+        event port eventOut
+
+        @ A port for emitting text events
+        text event port textEventOut
+
+        @ A port for emitting telemetry
+        telemetry port tlmOut
+
+        @ A port for getting parameter values
+        param get port prmGetOut
+
+        @ A port for setting parameter values
+        param set port prmSetOut
+
+        @ A port for getting the time
+        time get port timeGetOut
+    }
+}

FppTest/interfaces/typed_ports.fpp

@@ -0,0 +1,112 @@
+module FppTest {
+    interface TypedPorts {
+        # ----------------------------------------------------------------------
+        # Typed input ports with no return type
+        # ----------------------------------------------------------------------
+
+        sync input port noArgsSync: [2] NoArgs
+
+        guarded input port noArgsGuarded: [2] NoArgs
+
+        sync input port primitiveArgsSync: [2] PrimitiveArgs
+
+        guarded input port primitiveArgsGuarded: [2] PrimitiveArgs
+
+        sync input port stringArgsSync: [2] StringArgs
+
+        guarded input port stringArgsGuarded: [2] StringArgs
+
+        sync input port enumArgsSync: [2] EnumArgs
+
+        guarded input port enumArgsGuarded: [2] EnumArgs
+
+        sync input port arrayArgsSync: [2] ArrayArgs
+
+        guarded input port arrayArgsGuarded: [2] ArrayArgs
+
+        sync input port structArgsSync: [2] StructArgs
+
+        guarded input port structArgsGuarded: [2] StructArgs
+
+        # ----------------------------------------------------------------------
+        # Typed output ports with no return type
+        # ----------------------------------------------------------------------
+
+        output port noArgsOut: [2] NoArgs
+
+        output port primitiveArgsOut: [2] PrimitiveArgs
+
+        output port stringArgsOut: [2] StringArgs
+
+        output port enumArgsOut: [2] EnumArgs
+
+        output port arrayArgsOut: [2] ArrayArgs
+
+        output port structArgsOut: [2] StructArgs
+
+        # ----------------------------------------------------------------------
+        # Typed input ports with return type
+        # ----------------------------------------------------------------------
+
+        sync input port noArgsReturnSync: NoArgsReturn
+
+        guarded input port noArgsReturnGuarded: NoArgsReturn
+
+        sync input port primitiveReturnSync: PrimitiveReturn
+
+        guarded input port primitiveReturnGuarded: PrimitiveReturn
+
+        sync input port stringReturnSync: StringReturn
+        
+        guarded input port stringReturnGuarded: StringReturn
+
+        sync input port stringAliasReturnSync: StringAliasReturn
+        
+        guarded input port stringAliasReturnGuarded: StringAliasReturn
+
+        sync input port enumReturnSync: EnumReturn
+
+        guarded input port enumReturnGuarded: EnumReturn
+
+        sync input port arrayReturnSync: ArrayReturn
+
+        guarded input port arrayReturnGuarded: ArrayReturn
+
+        sync input port arrayStringAliasReturnSync: ArrayStringAliasReturn
+
+        guarded input port arrayStringAliasReturnGuarded: ArrayStringAliasReturn
+
+        sync input port structReturnSync: StructReturn
+
+        guarded input port structReturnGuarded: StructReturn
+
+        # ----------------------------------------------------------------------
+        # Typed output ports with return type
+        # ----------------------------------------------------------------------
+
+        output port noArgsReturnOut: NoArgsReturn
+
+        output port primitiveReturnOut: PrimitiveReturn
+
+        output port stringReturnOut: StringReturn
+
+        output port stringAliasReturnOut: StringAliasReturn
+
+        output port enumReturnOut: EnumReturn
+
+        output port arrayReturnOut: ArrayReturn
+
+        output port arrayStringAliasReturnOut: ArrayStringAliasReturn
+
+        output port structReturnOut: StructReturn
+
+        # ----------------------------------------------------------------------
+        # Ports for testing special ports
+        # ----------------------------------------------------------------------
+
+        output port prmGetIn: Fw.PrmGet
+
+        output port prmSetIn: Fw.PrmSet
+
+    }
+}

FppTest/interfaces/typed_ports_async.fpp

@@ -0,0 +1,18 @@
+module FppTest {
+    interface TypedPortsAsync {
+        async input port noArgsAsync: [2] NoArgs
+
+        async input port primitiveArgsAsync: [2] PrimitiveArgs
+
+        async input port stringArgsAsync: [2] StringArgs
+
+        async input port enumArgsAsync: [2] EnumArgs assert
+
+        async input port arrayArgsAsync: [2] ArrayArgs priority 10 block
+
+        async input port structArgsAsync: [2] StructArgs priority 5 drop
+
+        async input port enumArgsHook: [2] EnumArgs hook
+
+    }
+}

Fw/CMakeLists.txt

@@ -6,6 +6,7 @@ add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Cmd/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Com/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Dp/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Fpy/")
+add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Interfaces/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Log/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Logger/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Prm/")

Fw/Interfaces/CMakeLists.txt

@@ -0,0 +1,15 @@
+####
+# F prime CMakeLists.txt:
+#
+# SOURCE_FILES: combined list of source and autocoding files
+# MOD_DEPS: (optional) module dependencies
+#
+####
+register_fprime_module(
+    Fw_Interfaces
+  AUTOCODER_INPUTS
+    "${CMAKE_CURRENT_LIST_DIR}/Channel.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/Command.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/Event.fpp"
+  INTERFACE
+)

Fw/Interfaces/Channel.fpp

@@ -0,0 +1,6 @@
+module Fw {
+    interface Channel {
+        @ Telemetry port
+        telemetry port tlmOut
+    }
+}

Fw/Interfaces/ChannelInterface.fppi

@@ -1,2 +0,0 @@
-    @ Telemetry port
-    telemetry port tlmOut

Fw/Interfaces/Command.fpp

@@ -0,0 +1,12 @@
+module Fw {
+    interface Command {
+        @ Command registration port
+        command reg port cmdRegOut
+
+        @ Command received port
+        command recv port cmdIn
+
+        @ Command response port
+        command resp port cmdResponseOut
+    }
+}

Fw/Interfaces/CommandInterface.fppi

@@ -1,8 +0,0 @@
-    @ Command registration port
-    command reg port cmdRegOut
-
-    @ Command received port
-    command recv port cmdIn
-
-    @ Command response port
-    command resp port cmdResponseOut

Fw/Interfaces/Event.fpp

@@ -0,0 +1,9 @@
+module Fw {
+    interface Event {
+        @ Text event port
+        text event port logTextOut
+
+        @ Event port
+        event port logOut
+    }
+}

Fw/Interfaces/EventInterface.fppi

@@ -1,5 +0,0 @@
-    @ Text event port
-    text event port logTextOut
-
-    @ Event port
-    event port logOut

Ref/BlockDriver/BlockDriver.fpp

@@ -7,7 +7,7 @@ module Ref {
     # General ports
     # ----------------------------------------------------------------------
 
-    include "../../Drv/Interfaces/TickInterface.fppi"
+    import Drv.Tick
 
     @ The rate group scheduler input
     async input port Sched: Svc.Sched

Ref/SignalGen/SignalGen.fpp

@@ -78,9 +78,9 @@ module Ref {
     # ----------------------------------------------------------------------
     # Interfaces
     # ----------------------------------------------------------------------
-    include "../../Fw/Interfaces/EventInterface.fppi"
-    include "../../Fw/Interfaces/CommandInterface.fppi"
-    include "../../Fw/Interfaces/ChannelInterface.fppi"
+    import Fw.Event
+    import Fw.Command
+    import Fw.Channel
 
   }
 

Svc/CMakeLists.txt

@@ -3,6 +3,7 @@
 # Ports
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Cycle/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Fatal/")
+add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Interfaces/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Ping/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/PolyIf/")
 add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Sched/")

Svc/Ccsds/SpacePacketDeframer/SpacePacketDeframer.fpp

@@ -3,7 +3,7 @@ module Ccsds {
     @ Deframer for the CCSDS Space Packet protocol
     passive component SpacePacketDeframer {
 
-        include "../../Interfaces/DeframerInterface.fppi"
+        import Deframer
 
         @ Port to validate a received sequence count for a given APID
         output port validateApidSeqCount: Ccsds.ApidSequenceCount

Svc/Ccsds/SpacePacketFramer/SpacePacketFramer.fpp

@@ -3,7 +3,7 @@ module Ccsds {
     @ Deframer for the CCSDS Space Packet protocol
     passive component SpacePacketFramer {
 
-        include "../../Interfaces/FramerInterface.fppi"
+        import Framer
 
         @ Port to allocate a buffer for a space packet
         output port bufferAllocate: Fw.BufferGet

Svc/Ccsds/TcDeframer/TcDeframer.fpp

@@ -3,7 +3,7 @@ module Ccsds {
     @ Deframer for the TC Space Data Link Protocol (CCSDS Standard)
     passive component TcDeframer {
 
-        include "../../Interfaces/DeframerInterface.fppi"
+        import Deframer
 
         @ Deframing received an invalid SCID
         event InvalidSpacecraftId(transmitted: U16, configured: U16) \

Svc/Ccsds/TmFramer/TmFramer.fpp

@@ -3,7 +3,7 @@ module Ccsds {
     @ Deframer for the TM Space Data Link Protocol (CCSDS Standard)
     passive component TmFramer {
 
-        include "../../Interfaces/FramerInterface.fppi"
+        import Framer
 
         ###############################################################################
         # Standard AC Ports: Required for Channels, Events, Commands, and Parameters  #

Svc/ChronoTime/ChronoTime.fpp

@@ -1,6 +1,6 @@
 module Svc {
     @ A time component using C++11 chrono library
     passive component ChronoTime {
-        include "../Interfaces/TimeInterface.fppi"
+        import Time
     }
 }

Svc/ComStub/ComStub.fpp

@@ -1,7 +1,7 @@
 module Svc {
     @ Communication adapter interface implementing communication adapter interface via a Drv.ByteStreamDriverModel.
     passive component ComStub {
-        include "../Interfaces/ComInterface.fppi"
+        import Com
 
         # ----------------------------------------------------------------------
         # Byte stream model

Svc/FprimeDeframer/FprimeDeframer.fpp

@@ -8,7 +8,7 @@ module Svc {
     # Deframer interface
     # ----------------------------------------------------------------------
 
-    include "../Interfaces/DeframerInterface.fppi"
+    import Deframer
 
     @ An invalid frame was received (too short to be a frame)
     event InvalidBufferReceived \

Svc/FprimeFramer/FprimeFramer.fpp

@@ -2,7 +2,7 @@ module Svc {
     @ Framer implementation for the F Prime protocol
     passive component FprimeFramer {
 
-        include "../Interfaces/FramerInterface.fppi"
+        import Framer
 
         # ----------------------------------------------------------------------
         # Allocation of buffers

Svc/FprimeRouter/FprimeRouter.fpp

@@ -5,7 +5,7 @@ module Svc {
         # ----------------------------------------------------------------------
         # Router interface
         # ----------------------------------------------------------------------
-        include "../Interfaces/RouterInterface.fppi"
+        import Router
 
         @ Port for forwarding non-recognized packet types
         @ Ownership of the buffer is retained by the FprimeRouter, meaning receiving

Svc/FrameAccumulator/FrameAccumulator.fpp

@@ -5,7 +5,7 @@ module Svc {
         # ----------------------------------------------------------------------
         # FrameAccumulator interface
         # ----------------------------------------------------------------------
-        include "../Interfaces/FrameAccumulatorInterface.fppi"
+        import FrameAccumulator
 
         @ Port for deallocating buffers holding extracted frames
         output port bufferDeallocate: Fw.BufferSend

Svc/Interfaces/CMakeLists.txt

@@ -0,0 +1,18 @@
+####
+# F prime CMakeLists.txt:
+#
+# SOURCE_FILES: combined list of source and autocoding files
+# MOD_DEPS: (optional) module dependencies
+#
+####
+register_fprime_module(
+    Svc_Interfaces
+  AUTOCODER_INPUTS
+    "${CMAKE_CURRENT_LIST_DIR}/Com.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/Deframer.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/FrameAccumulator.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/Framer.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/Router.fpp"
+    "${CMAKE_CURRENT_LIST_DIR}/Time.fpp"
+  INTERFACE
+)

Svc/Interfaces/Com.fpp

@@ -0,0 +1,23 @@
+module Svc {
+    @ Communications Adapter Interface
+    interface Com {
+        @ Data to be sent on the wire (coming in to the component)
+        sync input port dataIn: Svc.ComDataWithContext
+
+        @ Data received from the wire (going out of the component)
+        output port dataOut: Svc.ComDataWithContext
+
+        @ Status of the last transmission
+        output port comStatusOut: Fw.SuccessCondition
+
+        # ----------------------------------------------------------------------
+        # Memory management
+        # ----------------------------------------------------------------------
+
+        @ Port returning ownership of data that came in on dataIn
+        output port dataReturnOut: Svc.ComDataWithContext
+
+        @ Port receiving back ownership of buffer sent out on dataOut
+        sync input port dataReturnIn: Svc.ComDataWithContext
+    }
+}

Svc/Interfaces/ComInterface.fppi

@@ -1,22 +0,0 @@
-# ----------------------------------------------------------------------
-# Com Data and Status
-# ----------------------------------------------------------------------
-
-@ Data to be sent on the wire (coming in to the component)
-sync input port dataIn: Svc.ComDataWithContext
-
-@ Data received from the wire (going out of the component)
-output port dataOut: Svc.ComDataWithContext
-
-@ Status of the last transmission
-output port comStatusOut: Fw.SuccessCondition
-
-# ----------------------------------------------------------------------
-# Memory management
-# ----------------------------------------------------------------------
-
-@ Port returning ownership of data that came in on dataIn
-output port dataReturnOut: Svc.ComDataWithContext
-
-@ Port receiving back ownership of buffer sent out on dataOut
-sync input port dataReturnIn: Svc.ComDataWithContext

Svc/Interfaces/Deframer.fpp

@@ -0,0 +1,15 @@
+module Svc {
+    interface Deframer {
+        @ Port to receive framed data, with optional context
+        guarded input port dataIn: Svc.ComDataWithContext
+
+        @ Port to output deframed data, with optional context
+        output port dataOut: Svc.ComDataWithContext
+
+        @ Port for returning ownership of received buffers to deframe
+        output port dataReturnOut: Svc.ComDataWithContext
+
+        @ Port receiving back ownership of sent buffers
+        sync input port dataReturnIn: Svc.ComDataWithContext
+    }
+}

Svc/Interfaces/DeframerInterface.fppi

@@ -1,11 +0,0 @@
-@ Port to receive framed data, with optional context
-guarded input port dataIn: Svc.ComDataWithContext
-
-@ Port to output deframed data, with optional context
-output port dataOut: Svc.ComDataWithContext
-
-@ Port for returning ownership of received buffers to deframe
-output port dataReturnOut: Svc.ComDataWithContext
-
-@ Port receiving back ownership of sent buffers
-sync input port dataReturnIn: Svc.ComDataWithContext

Svc/Interfaces/FrameAccumulator.fpp

@@ -0,0 +1,15 @@
+module Svc {
+    interface FrameAccumulator {
+        @ Receive raw bytes from a ComInterface (e.g. ComStub)
+        guarded input port dataIn: Svc.ComDataWithContext
+
+        @ Port for sending an extracted frame out
+        output port dataOut: Svc.ComDataWithContext
+
+        @ Port for returning ownership of buffers received on dataIn
+        output port dataReturnOut: Svc.ComDataWithContext
+
+        @ Port receiving back ownership of buffers sent on frameOut
+        sync input port dataReturnIn: Svc.ComDataWithContext
+    }
+}

Svc/Interfaces/FrameAccumulatorInterface.fppi

@@ -1,11 +0,0 @@
-@ Receive raw bytes from a ComInterface (e.g. ComStub)
-guarded input port dataIn: Svc.ComDataWithContext
-
-@ Port for sending an extracted frame out
-output port dataOut: Svc.ComDataWithContext
-
-@ Port for returning ownership of buffers received on dataIn
-output port dataReturnOut: Svc.ComDataWithContext
-
-@ Port receiving back ownership of buffers sent on frameOut
-sync input port dataReturnIn: Svc.ComDataWithContext

Svc/Interfaces/Framer.fpp

@@ -0,0 +1,32 @@
+module Svc {
+    @ ----------------------------------------------------------------------
+    @ Framing
+    @ ----------------------------------------------------------------------
+    interface Framer {
+        @ Port to receive data to frame, in a Fw::Buffer with optional context
+        sync input port dataIn: Svc.ComDataWithContext
+
+        @ Port to output framed data with optional context
+        output port dataOut: Svc.ComDataWithContext
+
+        # ----------------------------------------------------------------------
+        # Data ownership
+        # ----------------------------------------------------------------------
+        @ Port for returning ownership of the incoming Fw::Buffer to its sender
+        @ once framing is handled
+        output port dataReturnOut: Svc.ComDataWithContext
+
+        @ Buffer coming from a deallocate call in a ComDriver component
+        sync input port dataReturnIn: Svc.ComDataWithContext
+
+        # ----------------------------------------------------------------------
+        # Handling of ready signals (ComQueue <-> ComInterface)
+        # ----------------------------------------------------------------------
+        @ Port receiving the general status from the downstream component
+        @ indicating it is ready or not-ready for more input
+        sync input port comStatusIn: Fw.SuccessCondition
+
+        @ Port receiving indicating the status of framer for receiving more data
+        output port comStatusOut: Fw.SuccessCondition
+    }
+}

Svc/Interfaces/FramerInterface.fppi

@@ -1,28 +0,0 @@
-# ----------------------------------------------------------------------
-# Framing
-# ----------------------------------------------------------------------
-@ Port to receive data to frame, in a Fw::Buffer with optional context
-sync input port dataIn: Svc.ComDataWithContext
-
-@ Port to output framed data with optional context
-output port dataOut: Svc.ComDataWithContext
-
-# ----------------------------------------------------------------------
-# Data ownership
-# ----------------------------------------------------------------------
-@ Port for returning ownership of the incoming Fw::Buffer to its sender
-@ once framing is handled
-output port dataReturnOut: Svc.ComDataWithContext
-
-@ Buffer coming from a deallocate call in a ComDriver component
-sync input port dataReturnIn: Svc.ComDataWithContext
-
-# ----------------------------------------------------------------------
-# Handling of ready signals (ComQueue <-> ComInterface)
-# ----------------------------------------------------------------------
-@ Port receiving the general status from the downstream component
-@ indicating it is ready or not-ready for more input
-sync input port comStatusIn: Fw.SuccessCondition
-
-@ Port receiving indicating the status of framer for receiving more data
-output port comStatusOut: Fw.SuccessCondition

Svc/Interfaces/Router.fpp

@@ -0,0 +1,29 @@
+module Svc {
+    interface Router {
+        # ---------------------------------------------
+        # Router <-> Deframers
+        # ---------------------------------------------
+
+        @ Receiving data (Fw::Buffer) to be routed with optional context to help with routing
+        sync input port dataIn: Svc.ComDataWithContext
+
+        @ Port for returning ownership of data (includes Fw.Buffer) received on dataIn
+        output port dataReturnOut: Svc.ComDataWithContext
+
+        # ---------------------------------------------
+        # Router <-> CmdDispatch/FileUplink
+        # ---------------------------------------------
+
+        @ Port for sending file packets as Fw::Buffer (ownership passed to receiver)
+        output port fileOut: Fw.BufferSend
+
+        @ Port for receiving ownership back of buffers sent on fileOut
+        sync input port fileBufferReturnIn: Fw.BufferSend
+
+        @ Port for sending command packets as Fw::ComBuffers
+        output port commandOut: Fw.Com
+
+        @ Port for receiving command responses from a command dispatcher (can be a no-op)
+        sync input port cmdResponseIn: Fw.CmdResponse
+    }
+}

Svc/Interfaces/RouterInterface.fppi

@@ -1,23 +0,0 @@
-# ---------------------------------------------
-# Router <-> Deframers
-# ---------------------------------------------
-@ Receiving data (Fw::Buffer) to be routed with optional context to help with routing
-sync input port dataIn: Svc.ComDataWithContext
-
-@ Port for returning ownership of data (includes Fw.Buffer) received on dataIn
-output port dataReturnOut: Svc.ComDataWithContext
-
-# ---------------------------------------------
-# Router <-> CmdDispatch/FileUplink
-# ---------------------------------------------
-@ Port for sending file packets as Fw::Buffer (ownership passed to receiver)
-output port fileOut: Fw.BufferSend
-
-@ Port for receiving ownership back of buffers sent on fileOut
-sync input port fileBufferReturnIn: Fw.BufferSend
-
-@ Port for sending command packets as Fw::ComBuffers
-output port commandOut: Fw.Com
-
-@ Port for receiving command responses from a command dispatcher (can be a no-op)
-sync input port cmdResponseIn: Fw.CmdResponse

Svc/Interfaces/Time.fpp

@@ -0,0 +1,6 @@
+module Svc {
+    interface Time {
+        @ Port to retrieve time
+        sync input port timeGetPort: Fw.Time
+    }
+}

Svc/Interfaces/TimeInterface.fppi

@@ -1,2 +0,0 @@
-@ Port to retrieve time
-sync input port timeGetPort: Fw.Time

Svc/LinuxTimer/LinuxTimer.fpp

@@ -4,7 +4,7 @@ module Svc {
   passive component LinuxTimer {
 
     @ implement tick interface
-    include "../../Drv/Interfaces/TickInterface.fppi"
+    import Drv.Tick
 
   }
 

Svc/OsTime/OsTime.fpp

@@ -2,7 +2,7 @@ module Svc {
 
     @ A time component using OSAL RawTime abstractions
     passive component OsTime {
-        include "../Interfaces/TimeInterface.fppi"
+        import Time
 
         sync input port setEpoch: OsTimeEpoch
 

Svc/PosixTime/PosixTime.fpp

@@ -1,6 +1,6 @@
 module Svc {
   @ A component for getting time
   passive component PosixTime {
-    include "../Interfaces/TimeInterface.fppi"
+    import Time
   }
 }

requirements.txt

@@ -22,19 +22,19 @@ fprime-fpl-convert-xml==1.0.3
 fprime-fpl-extract-xml==1.0.3
 fprime-fpl-layout==1.0.3
 fprime-fpl-write-pic==1.0.3
-fprime-fpp-check==3.0.0a11
-fprime-fpp-depend==3.0.0a11
-fprime-fpp-filenames==3.0.0a11
-fprime-fpp-format==3.0.0a11
-fprime-fpp-from-xml==3.0.0a11
-fprime-fpp-locate-defs==3.0.0a11
-fprime-fpp-locate-uses==3.0.0a11
-fprime-fpp-syntax==3.0.0a11
-fprime-fpp-to-cpp==3.0.0a11
-fprime-fpp-to-dict==3.0.0a11
-fprime-fpp-to-json==3.0.0a11
-fprime-fpp-to-xml==3.0.0a11
-fprime-fpp-to-layout==3.0.0a11
+fprime-fpp-check==3.0.0a12
+fprime-fpp-depend==3.0.0a12
+fprime-fpp-filenames==3.0.0a12
+fprime-fpp-format==3.0.0a12
+fprime-fpp-from-xml==3.0.0a12
+fprime-fpp-locate-defs==3.0.0a12
+fprime-fpp-locate-uses==3.0.0a12
+fprime-fpp-syntax==3.0.0a12
+fprime-fpp-to-cpp==3.0.0a12
+fprime-fpp-to-dict==3.0.0a12
+fprime-fpp-to-json==3.0.0a12
+fprime-fpp-to-xml==3.0.0a12
+fprime-fpp-to-layout==3.0.0a12
 fprime-gds==4.0.0a3
 fprime-tools==4.0.0a1
 fprime-visual==1.0.2