fprime/Svc/RateGroupDriver/RateGroupDriver.hpp
M Starch b76d8c9a0c
Update/types refactor as constants (#1623)
* lestarch: adding logical types implementation into Linux/StandardTypes.hpp

* lestarch: removing VxWorks StandardTypes from repository

* updated fprime types for correct compilation with vxworks and baremetal

* lestarch: refactoring types and configuration header w.r.t type design

* lestarch: replacing usages of AssertArg with FwAssertArgType

* lestarch: missspelled configuration

* lestarch: minor compilation fixes

* lestarch: renaming StandardTypes.hpp -> PlatformTypes.hpp

* lestarch: updating PRI tokens

* lestarch: replacing BasicTypes.hpp includes with FpConfig.hpp

* lestarch: UT and compilation fixes for types refactor

* lestarch: sp

* lestarch: fixing RPI issues in PassiveConsoleTextLogger

* lestarch: converting RPI build to debug

* lestarch: removing duplicate config imports

* lestarch: fixing documentation

* lestarch: fixing up multiple definitions and RPI compilation problems

* lestarch: reverting debug build

* lestarch: reverting platform types to class-based constants

* lestarch: reworking basic types

* lestarch: configured types refactor into classes

* lestarch: fixing bugs with static constants in classes

* lestarch: fixing platform types spelling and documentation

* lestarch: adding include guards to types headers

Co-authored-by: Kevin F Ortega <kevin.f.ortega@jpl.nasa.gov>
2022-08-18 13:25:56 -07:00

86 lines
2.6 KiB
C++

/**
* \file
* \author T. Canham
* \brief RateGroupDivider component implementation
*
* This component implements a divider function. A primary tick is invoked
* via the CycleIn port. The divider array then divides down the tick into
* CycleOut ports. The ports are called at the rate of
* input rate/divider[port]
*
* \copyright
* Copyright 2009-2015, by the California Institute of Technology.
* ALL RIGHTS RESERVED. United States Government Sponsorship
* acknowledged.
* <br /><br />
*/
#ifndef SVC_RATEGROUPDRIVER_HPP
#define SVC_RATEGROUPDRIVER_HPP
#include <Svc/RateGroupDriver/RateGroupDriverComponentAc.hpp>
#include <FpConfig.hpp>
namespace Svc {
//! \class RateGroupDriver
//! \brief Implementation class for RateGroupDriver
//!
//! Takes the input from CycleIn and divides it.
//! Output rate is CycleIn rate/divider[port]
//!
class RateGroupDriver : public RateGroupDriverComponentBase {
public:
//! \brief RateGroupDriver constructor
//!
//! The constructor takes the divider array and stores it
//! for use when the CycleIn port is called.
//!
//! \param compName component name
//!
RateGroupDriver(const char* compName);
//! \brief RateGroupDriver initialization function
//!
//! The init() function initializes the autocoded base class
void init(NATIVE_INT_TYPE instanceId = 0);
//! \brief RateGroupDriver configuration function
//! \param dividers array of integers used to divide down input tick
//! \param numDividers size of dividers array
void configure(NATIVE_INT_TYPE dividers[], NATIVE_INT_TYPE numDividers);
//! \brief RateGroupDriverImpl destructor
~RateGroupDriver();
PRIVATE:
//! downcall for input port
//! NOTE: This port can execute in ISR context.
void CycleIn_handler(NATIVE_INT_TYPE portNum, Svc::TimerVal& cycleStart);
//! divider array
NATIVE_INT_TYPE m_dividers[NUM_CYCLEOUT_OUTPUT_PORTS];
//! size of divider array
NATIVE_INT_TYPE m_numDividers;
//! tick counter
NATIVE_INT_TYPE m_ticks;
//! rollover counter
NATIVE_INT_TYPE m_rollover;
public:
//! Size of the divider table, provided as a constants to users passing the table in
static const NATIVE_UINT_TYPE DIVIDER_SIZE = NUM_CYCLEOUT_OUTPUT_PORTS;
};
}
#endif