mirror of
https://github.com/nasa/fprime.git
synced 2025-12-11 13:04:17 -06:00
* Much work on set flags * Little more work on flags * Get UTs passing * Defaults for flags * Add uts for set flag * Switch from bitfield to boolean array * fix ut * more work on flag system * Add some uts * Add getflag dir * format * Update docs * sp * Remove update on change from bool tlm * pr feedback --------- Co-authored-by: Zimri Leisher <zimri.leisher@fireflyspace.com>
392 lines
17 KiB
C++
392 lines
17 KiB
C++
#include <new>
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#include "Svc/FpySequencer/FpySequencer.hpp"
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namespace Svc {
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// ----------------------------------------------------------------------
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// Functions to implement for internal state machine actions
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// ----------------------------------------------------------------------
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//! Implementation for action signalEntered of state machine Svc_FpySequencer_SequencerStateMachine
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//!
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//! simply raises the "entered" signal
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_signalEntered(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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this->sequencer_sendSignal_entered();
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}
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//! Implementation for action setSequenceFilePath of state machine
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//! Svc_FpySequencer_SequencerStateMachine
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//!
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//! sets the current sequence file path member var
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_setSequenceFilePath(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal, //!< The signal
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const Svc::FpySequencer_SequenceExecutionArgs& value //!< The value
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) {
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this->m_sequenceFilePath = value.get_filePath();
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}
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//! Implementation for action setSequenceBlockState of state machine
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//! Svc_FpySequencer_SequencerStateMachine
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//!
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//! sets the block state of the sequence to be run
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_setSequenceBlockState(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal, //!< The signal
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const Svc::FpySequencer_SequenceExecutionArgs& value //!< The value
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) {
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this->m_sequenceBlockState = value.get_block();
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}
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//! Implementation for action report_seqSucceeded of state machine
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//! Svc_FpySequencer_SequencerStateMachine
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//!
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//! reports that a sequence was completed
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_report_seqSucceeded(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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this->m_tlm.sequencesSucceeded++;
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this->log_ACTIVITY_HI_SequenceDone(this->m_sequenceFilePath);
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if (this->isConnected_seqDoneOut_OutputPort(0)) {
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// report that the sequence succeeded to internal callers
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this->seqDoneOut_out(0, 0, 0, Fw::CmdResponse::OK);
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}
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}
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//! Implementation for action report_seqCancelled of state machine
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//! Svc_FpySequencer_SequencerStateMachine
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//!
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//! reports that a sequence was cancelled
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_report_seqCancelled(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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this->m_tlm.sequencesCancelled++;
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this->log_ACTIVITY_HI_SequenceCancelled(this->m_sequenceFilePath);
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if (this->isConnected_seqDoneOut_OutputPort(0)) {
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// report that the sequence failed to internal callers
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this->seqDoneOut_out(0, 0, 0, Fw::CmdResponse::EXECUTION_ERROR);
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}
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}
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//! Implementation for action dispatchStatement of state machine
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//! Svc_FpySequencer_SequencerStateMachine
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//!
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//! iterates to the next statement and dispatches it
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_dispatchStatement(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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Signal result = this->dispatchStatement();
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switch (result) {
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case Signal::result_dispatchStatement_noMoreStatements: {
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this->sequencer_sendSignal_result_dispatchStatement_noMoreStatements();
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break;
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}
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case Signal::result_dispatchStatement_success: {
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this->sequencer_sendSignal_result_dispatchStatement_success();
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break;
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}
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case Signal::result_dispatchStatement_failure: {
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this->sequencer_sendSignal_result_dispatchStatement_failure();
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break;
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}
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default: {
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FW_ASSERT(0, static_cast<FwAssertArgType>(result));
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}
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}
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}
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//! Implementation for action setGoalState_RUNNING of state machine
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//! Svc_FpySequencer_SequencerStateMachine
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//!
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//! sets the goal state to RUNNING
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_setGoalState_RUNNING(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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this->m_goalState = FpySequencer_GoalState::RUNNING;
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}
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//! Implementation for action setGoalState_VALID of state machine
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//! Svc_FpySequencer_SequencerStateMachine
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//!
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//! sets the goal state to VALID
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_setGoalState_VALID(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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this->m_goalState = FpySequencer_GoalState::VALID;
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}
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//! Implementation for action setGoalState_IDLE of state machine
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//! Svc_FpySequencer_SequencerStateMachine
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//!
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//! sets the goal state to IDLE
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_setGoalState_IDLE(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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this->m_goalState = FpySequencer_GoalState::IDLE;
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}
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//! Implementation for action sendCmdResponse_OK of state machine
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//! Svc_FpySequencer_SequencerStateMachine
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//!
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//! responds to the calling command with OK
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_sendCmdResponse_OK(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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if (this->m_sequenceBlockState == FpySequencer_BlockState::BLOCK) {
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// respond if we were waiting on a response
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this->cmdResponse_out(this->m_savedOpCode, this->m_savedCmdSeq, Fw::CmdResponse::OK);
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}
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}
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//! Implementation for action sendCmdResponse_EXECUTION_ERROR of state machine
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//! Svc_FpySequencer_SequencerStateMachine
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//!
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//! responds to the calling command with EXECUTION_ERROR
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_sendCmdResponse_EXECUTION_ERROR(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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if (this->m_sequenceBlockState == FpySequencer_BlockState::BLOCK) {
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// respond if we were waiting on a response
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this->cmdResponse_out(this->m_savedOpCode, this->m_savedCmdSeq, Fw::CmdResponse::EXECUTION_ERROR);
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}
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}
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//! Implementation for action resetRuntime of state machine
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//! Svc_FpySequencer_SequencerStateMachine
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//!
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//! resets the sequence runtime
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_resetRuntime(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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// explicitly call dtor
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this->m_runtime.~Runtime();
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new (&this->m_runtime) Runtime();
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Fw::ParamValid valid;
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this->m_runtime.flags[Fpy::FlagId::EXIT_ON_CMD_FAIL] = this->paramGet_FLAG_DEFAULT_EXIT_ON_CMD_FAIL(valid);
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}
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//! Implementation for action validate of state machine
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//! Svc_FpySequencer_SequencerStateMachine
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//!
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//! performs all steps necessary for sequence validation, and raises a signal
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//! result_success or result_failure
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_validate(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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Fw::Success result = this->validate();
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if (result == Fw::Success::FAILURE) {
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this->sequencer_sendSignal_result_failure();
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return;
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}
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this->sequencer_sendSignal_result_success();
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}
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//! Implementation for action checkShouldWake of state machine Svc_FpySequencer_SequencerStateMachine
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//!
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//! checks if sequencer should wake from sleep
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_checkShouldWake(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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Signal result = this->checkShouldWake();
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switch (result) {
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case Signal::result_checkShouldWake_keepSleeping: {
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this->sequencer_sendSignal_result_checkShouldWake_keepSleeping();
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break;
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}
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case Signal::result_checkShouldWake_wakeup: {
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this->sequencer_sendSignal_result_checkShouldWake_wakeup();
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break;
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}
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case Signal::result_timeOpFailed: {
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this->sequencer_sendSignal_result_timeOpFailed();
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break;
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}
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default: {
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FW_ASSERT(0, static_cast<FwAssertArgType>(result));
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}
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}
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}
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//! Implementation for action checkStatementTimeout of state machine Svc_FpySequencer_SequencerStateMachine
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//!
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//! checks if the current statement has timed out
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_checkStatementTimeout(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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Signal result = this->checkStatementTimeout();
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switch (result) {
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case Signal::result_checkStatementTimeout_noTimeout: {
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this->sequencer_sendSignal_result_checkStatementTimeout_noTimeout();
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break;
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}
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case Signal::result_checkStatementTimeout_statementTimeout: {
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this->sequencer_sendSignal_result_checkStatementTimeout_statementTimeout();
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break;
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}
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case Signal::result_timeOpFailed: {
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this->sequencer_sendSignal_result_timeOpFailed();
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break;
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}
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default: {
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FW_ASSERT(0, static_cast<FwAssertArgType>(result));
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}
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}
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}
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//! Implementation for action incrementSequenceCounter of state machine Svc_FpySequencer_SequencerStateMachine
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//!
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//! increments the m_sequencesStarted counter
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_incrementSequenceCounter(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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this->m_sequencesStarted++;
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}
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//! Implementation for action clearSequenceFile of state machine Svc_FpySequencer_SequencerStateMachine
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//!
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//! clears all variables related to the loading/validating of the sequence file
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_clearSequenceFile(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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this->m_sequenceFilePath = "";
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}
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//! Implementation for action clearBreakpoint of state machine Svc_FpySequencer_SequencerStateMachine
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//!
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//! clears the breakpoint, allowing execution of the sequence to continue
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_clearBreakpoint(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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this->m_breakpoint.breakpointInUse = false;
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this->m_breakpoint.breakpointIndex = 0;
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this->m_breakpoint.breakOnlyOnceOnBreakpoint = false;
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this->m_breakpoint.breakBeforeNextLine = false;
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}
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//! Implementation for action report_seqBroken of state machine Svc_FpySequencer_SequencerStateMachine
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//!
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//! reports that a breakpoint was hit
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_report_seqBroken(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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this->log_ACTIVITY_HI_SequencePaused(this->m_runtime.nextStatementIndex);
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}
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//! Implementation for action setBreakpoint of state machine Svc_FpySequencer_SequencerStateMachine
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//!
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//! sets the breakpoint to the provided args
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_setBreakpoint(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal, //!< The signal
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const Svc::FpySequencer_BreakpointArgs& value //!< The value
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) {
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this->m_breakpoint.breakpointInUse = value.get_breakOnBreakpoint();
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this->m_breakpoint.breakOnlyOnceOnBreakpoint = value.get_breakOnlyOnceOnBreakpoint();
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this->m_breakpoint.breakpointIndex = value.get_breakpointIndex();
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this->log_ACTIVITY_HI_BreakpointSet(value.get_breakpointIndex(), value.get_breakOnlyOnceOnBreakpoint());
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}
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//! Implementation for action setBreakBeforeNextLine of state machine Svc_FpySequencer_SequencerStateMachine
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//!
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//! sets the "break on next line" flag to true
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_setBreakBeforeNextLine(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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this->m_breakpoint.breakBeforeNextLine = true;
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}
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//! Implementation for action clearBreakBeforeNextLine of state machine Svc_FpySequencer_SequencerStateMachine
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//!
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//! sets the "break on next line" flag to false
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_clearBreakBeforeNextLine(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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this->m_breakpoint.breakBeforeNextLine = false;
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}
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//! Implementation for action report_seqFailed of state machine Svc_FpySequencer_SequencerStateMachine
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//!
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//! called when a sequence failed to execute successfully
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_report_seqFailed(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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if (this->isConnected_seqDoneOut_OutputPort(0)) {
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// report that the sequence failed to internal callers
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this->seqDoneOut_out(0, 0, 0, Fw::CmdResponse::EXECUTION_ERROR);
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}
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}
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//! Implementation for action report_seqStarted of state machine Svc_FpySequencer_SequencerStateMachine
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//!
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//! reports that a sequence was started
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void FpySequencer::Svc_FpySequencer_SequencerStateMachine_action_report_seqStarted(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) {
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if (this->isConnected_seqDoneOut_OutputPort(0)) {
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// report that the sequence started to internal callers
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this->seqStartOut_out(0, this->m_sequenceFilePath);
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}
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}
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// ----------------------------------------------------------------------
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// Functions to implement for internal state machine guards
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// ----------------------------------------------------------------------
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//! Implementation for guard goalStateIs_RUNNING of state machine
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//! Svc_FpySequencer_SequencerStateMachine
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//!
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//! return true if the goal state is RUNNING
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bool FpySequencer::Svc_FpySequencer_SequencerStateMachine_guard_goalStateIs_RUNNING(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) const {
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return this->m_goalState == FpySequencer_GoalState::RUNNING;
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}
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//! Implementation for guard shouldBreak of state machine Svc_FpySequencer_SequencerStateMachine
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//!
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//! return true if should break at this point in execution, before dispatching
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//! next stmt
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bool FpySequencer::Svc_FpySequencer_SequencerStateMachine_guard_shouldBreak(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) const {
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// there are really two mechanisms for pausing the execution of the seq
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// one is the "break on next line flag", and the other is the breakpoint
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return this->m_breakpoint.breakBeforeNextLine ||
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(this->m_breakpoint.breakpointInUse &&
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this->m_breakpoint.breakpointIndex == this->m_runtime.nextStatementIndex);
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}
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//! Implementation for guard breakOnce of state machine Svc_FpySequencer_SequencerStateMachine
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//!
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//! return true if this breakpoint should only happen once
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bool FpySequencer::Svc_FpySequencer_SequencerStateMachine_guard_breakOnce(
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SmId smId, //!< The state machine id
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Svc_FpySequencer_SequencerStateMachine::Signal signal //!< The signal
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) const {
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return this->m_breakpoint.breakOnlyOnceOnBreakpoint;
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}
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} // namespace Svc
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