Add new Fw.Ready port for coordinating startup (#3261)

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Cel Skeggs 2025-02-27 11:12:14 -08:00 committed by GitHub
parent ed0eb98868
commit ff5b64daff
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3 changed files with 33 additions and 0 deletions

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@ -19,6 +19,7 @@ add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/FilePacket/")
add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Obj/")
add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Port/")
add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Ports/CompletionStatus")
add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Ports/Ready")
add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Ports/Signal")
add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/Ports/SuccessCondition")
add_fprime_subdirectory("${CMAKE_CURRENT_LIST_DIR}/SerializableFile/")

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@ -0,0 +1,9 @@
####
# CMakeLists.txt:
#
# Sets up the fprime module build within CMake.
####
set(SOURCE_FILES
"${CMAKE_CURRENT_LIST_DIR}/Ready.fpp"
)
register_fprime_module()

23
Fw/Ports/Ready/Ready.fpp Normal file
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@ -0,0 +1,23 @@
#####
# Ready:
#
# A port without arguments for coordinating startup.
#####
module Fw {
@ As an input: Request that a component start operating or indicate that
@ the prerequisites for the component are satisfied.
@ As an output: Indicate that a component is now operating normally and is
@ ready to service requests.
@
@ Each Ready port shall be invoked once.
@ - Invoking a Ready port more than once is a coding defect worthy of an
@ assertion.
@ - Failing to invoke a Ready port is a coding defect that may result in a
@ component remaining inoperative or not becoming fully operative.
@ - It may be a coding defect worthy of an assertion, depending on the
@ specification for each component, to attempt to operate a component
@ that is not ready: that is, a component that has not received all
@ Ready inputs or has not yet invoked all Ready outputs.
port Ready()
}