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57 lines
1.2 KiB
Plaintext
57 lines
1.2 KiB
Plaintext
=== Internal Port Specifiers
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An *internal port specifier* specifies
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a single-use port for use in handlers of the enclosing
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<<Definitions_Component-Definitions,component>>.
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A component can use an internal port to send a message
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to itself.
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==== Syntax
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`internal` `port`
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<<Lexical-Elements_Identifiers,_identifier_>>
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_[_
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`(`
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<<Formal-Parameter-Lists,_param-list_>>
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`)`
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_]_
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_[_
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`priority` <<Expressions,_expression_>>
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_]_
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_[_
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_queue-full-behavior_
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_]_
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_queue-full-behavior_ has the same syntax as for
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<<Specifiers_Port-Instance-Specifiers_Syntax,port instance specifiers>>.
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==== Semantics
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The identifier is the name of the port.
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The parameter list specifies the formal parameters of the
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port.
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Each formal parameter is a piece of data carried on the port.
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The names of the formal parameters must be distinct.
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No formal parameter may be a `ref` parameter.
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The optional priority and queue full behavior have the same semantics as in
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<<Specifiers_Port-Instance-Specifiers_Semantics, async input port instance
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specifiers>>.
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==== Examples
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[source,fpp]
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----
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@ Port 1
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internal port Port1(
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a: U32 @< Parameter a
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b: F64 @< Parameter b
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)
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@ Port 2
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internal port Port2(
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a: U8 @< Parameter a
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b: I32 @< Parameter b
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) priority 10 drop
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----
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